Intel's 0.13 Micron Process Still a Go for 2001?

Posted By Van Smith

Date: August 2, 2001

Intel denies rumors that its failure to obtain crucial equipment will derail its move to new process geometries within the year.


SVG Stumbles

Despite several recent reports suggesting that the delay of Silicon Valley Group's 0.193 nm lithography tools, the Micrascan 193 High Numerical Aperture (HNA) scanners, would mean that Intel would encounter prohibitively expensive conversion costs if it pressed forwards with its stated goal of ramping 0.13 micron parts beginning in Q2 of this year, the Santa Clara, California, chipmaker vehemently claims that this will not serve as a setback to this transition.

Responding to one of several recent reports claiming SVG's snafu would mean delays because of the time necessary to qualify the workaround, a hard phase shift mask, and that this workaround would be considerably more expensive to implement -- akin to producing production parts with methods normally employed to make prototypes -- Intel spokesman George Alfs told VHJ:

There is no delay. As I mentioned, we have been shipping production .13 micron since May, and the ramp is healthy. We have been using phase shift technology for years (.25 micron, .18micron, and now .13 micron) and it is not more expensive than other technologies. Fab 20 in Oregon is already in .13 micron production using phase shift technology, and we will have three more fabs in .13 micron production using this technology by the end of the year.

Meanwhile, The Inquirer reported today that Intel has canceled its $100 million dollar order for SVG equipment and that Intel will use the hard phase shift mask workaround indefinitely to produce 0.13 micron parts.


Smaller, Cheaper, Faster, Cooler

The term "process geometry" indicates the scale at which semiconductor circuitry is etched.  Both Intel and AMD currently utilize a 0.18 micron (millionth of a meter) process on the vast bulk of their chips, and both chipmakers are moving to a finer 0.13 micron process as this year progresses.  Transitioning to this smaller scale will mean a significant reduction of die sizes enabling more processors to be etched from a wafer.  The number of processors dies per wafer is inversely proportionally to cost, so moving to a 0.13 micron process should eventually reduce production expenses. 

Also, the resultant smaller chips typically consume less power at any clock speed or reach higher clock speeds while using the same amount of power when compared with analogous chip architectures produced on the coarser 0.18 micron process.

Transitioning to a new process is slow and expensive.  Moreover, Intel is also adopting new copper technology, a feature AMD has already had in its chips for over a year.  Intel has been producing limited numbers of a 0.13 micron version of its aging Pentium III core.  Known as "Tualatin," these chips currently in production are intended mainly for mobile applications where quantity demands are limited. 

Intel has also stated its intention to begin production of a new 0.13 micron version of its controversial Pentium 4, the "Northwood," in the coming months of this year.  Moving to smaller process geometries is important since the die size of the current 0.18 micron P4, often referred to as "Willamette," is an enormous 217 mm2, making the chip expensive to produce.  Due to its power demands, the Pentium 4, both Willamette and Northwood versions, will be initially limited to desktops.


The Race With AMD

We have maintained for some time, as has Intel's archrival AMD, that 0.13 micron chips will first be produced in quantity almost simultaneously from both manufacturers in early 2002. 

However, AMD has publicly stated that it will now stagger the introduction of Silicon-On-Insulator enhanced technologies so as to follow 0.13 micron introduction by about six months.  We believe that the current costs of introducing SOI, and the corresponding returns for doing so, is the guiding factor in this decision.  The costs of SOI should drop considerably by H2, 2002, and the benefits of using this technology will be more apparent with chip designs AMD intends to rollout in this timeframe.