No Rambus for Hammer
By Van Smith
Date: February 22, 2002
Recent rumors circulating around the Internet allege that Advanced Micro Device’s upcoming 64-bit processor will make use of memory technology from controversial intellectual property peddler Rambus, Inc. However the rumors are false, according to AMD spokesman Damon Muzny. Responding to our questions on the subject, Mr. Muzny reiterated previously disclosed information regarding the Hammer design. According to Mr. Muzny, “Hammer architecture is planned to implement support for PC1600, PC2100, and PC2700 (DDR333).” This memory support will come in both single channel (64-bit) and dual-channel (128-bit) varieties, as was discussed at the recent Platform Conference.
Hammer possesses a dual ported integrated memory controller. While a Rambus variant of Hammer might serve to reduce pin count, the latency penalties that the serialized memory design imposes has caused the technology to underperform similarly equipped SDRAM and DDR SDRAM systems in the past, especially when these systems were gated by processor throughput requirements. Furthermore, a dual-channel PC2700 system will boast 5.4GB/s of bandwidth, which would demand an expensive quad-channel RDRAM system to match.
AMD licensed Rambus RDRAM technology in the months before the original Athlon was introduced because of Intel’s declaration to make RDRAM the next industry standard. However, AMD backed away from the Mountain View, California-based design when their tests indicated that SDRAM and DDR SDRAM were better matches for its line of CPUs. Just last month Rambus’s biggest supporter, Intel, served a major setback to RDRAM penetration into the desktop market with its launch of DDR SDRAM-enabled i845d chipsets for its Pentium 4 processors, something the CPU giant originally said it would never do.
Although Rambus sees its market share remaining essentially static over the next few years, most independent analysts forecast RDRAM’s already thin pie slice to become a transparent sliver in the years to come.
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